Standard computer architectures suffer from von Neumann bottlenecks for all processing is done exclusively on the processor.
The computer's memory is not involved in processing, as it is only used to store programs and data. When a computing system or application has large amounts of data, moving data between memory and the processor can slow down processing.
Adding processing directly into memory can help alleviate this problem. Processing In Memory (PIM) or Processing Near Memory (PNM) is capable of manipulating data in computer memory.
By moving part of the computation to a memory device, PIM/PNM solves a fundamental problem in modern computing system design: the mismatch between von Neumann architectures and the huge memory bandwidth demanding of applications.
Many industrial prototypes and products are under development or are already available on the market, and these devices show promise for cost-effective and energy-efficient acceleration of HPC, AI, and Big-Data analytics workloads.
This panel will discuss the reasons for the renewed interest in PIM/PNM and its technological readiness and challenges in terms of Applications, System and SW.
Seungwon Lee
Seungwon Lee is a Master (VP of Technology) at Samsung, where he leads Computing SW Team at SAIT(Samsung Advanced Institute of Technology) of Samsung Electronics.
His research interests include large scale deep learning computing SW and In/Near memory computing SW.
Lee received a Ph.D degree in computer science and engineering from Seoul National University.
George Apostol
George has over 35 years of experience designing system-on-chip (SoC), hardware, software, and systems. He holds several patents for interconnect and interface design and has led technology organizations developing products for several markets. He has held leadership and executive roles at Xerox/PARC, Sun, SGI, LSI Logic, Exar, and Samsung as well as start-ups including TiVo, BRECIS, Audience and BAYIS. As VP of Engineering and CTO at PLX Technology, George drove the development of PCI Express switches, which are broadly used in the market today. He received his bachelor’s degree in Electrical Engineering from the Massachusetts Institute of Technology.
Andy Mills
Andy Mills is the Snr Director of Advanced Product Development at SMART Modular Technologies, where he leads the development of next generation CXL memory and data center storage solutions.
Prior to joining SMART, Andy was CEO/co-founder of Enmotus, Inc where he co-developed and led the development of intelligent storage and memory tiering solutions for data center and high end PCs utilizing advanced learning algorithms driven by real time intelligent workload analysis. He has more than 30 years industry experience in software development, systems architecture, networking, storage and semiconductor development, plus held various management and technical lead positions at DotHill Systems, NetCell Corporation, TDK Semi, AMD.
Andy graduated with an MEng and BEng with Honors from Bangor University in the UK.
Seyong Lee
Seyong Lee is a Senior R&D Staff in the Computer Science and Mathematics Division at Oak Ridge National Laboratory (ORNL). His research interests include parallel programming and performance optimization in heterogeneous computing environments, program analysis, and optimizing compilers. He received his PhD in Electrical and Computer Engineering from Purdue University, USA.
He is a member of the OpenACC Technical Committee and a former member of the Seed Review Committee of the ORNL Seed Program and the NVIDIA PathForward Working Group of the Exascale Computing Project PathForward Program.
He served as a program committee/guest editor/external reviewer for various conferences, journals, and research proposals.
His paper on SC10 won the best student paper award, and his paper on PPoPP09 was selected as the most cited paper among all papers published in PPoPP between 2009 and 2014.
He received the IEEE Computer Society TCHPC Award for Excellence for Early Career Researchers in High Performance Computing at SC16 and served as an award committee member for 2017 IEEE CS TCHPC Award.
See his website for more information: https://seyonglee.github.io.
Nuwan Jayasena
Nuwan Jayasena is a Fellow at AMD Research, and leads a team exploring hardware support, software enablement, and application adaptation for processing in memory. His broader interests include memory system architecture, accelerator-based computing, and machine learning. Nuwan holds an M.S. and a Ph.D. in Electrical Engineering from Stanford University and a B.S. from the University of Southern California. He is an inventor of over 70 US patents, an author of over 30 peer-reviewed publications, and a Senior Member of the IEEE. Prior to AMD, Nuwan was a processor architect at Nvidia Corp. and at Stream Processors, Inc.
Paul Crumley
Paul G Crumley, a Senior Technical Staff Member at IBM Research, enjoys creating systems to solve problems beyond the reach of current technology.
Paul’s current project integrates secure, compliant AI capabilities with enterprise Hybrid Cloud allowing clients to extract new business value from their data.
Paul’s previous work includes the design and construction of distributed, and high-performance computing systems at CMU, Transarc, and IBM Research. Projects include The Andrew Project at CMU, ASCI White, IBM Global Storage Architecture, Blue Gene Supercomputers, IBM Cloud, and IBM Cognitive Systems. Paul has managed data centers, and brings his first-hand knowledge of these environments, combined with experience of automation and robustness, to the design of AI for Hybrid Cloud infrastructure.