Emerging Memories (MRAM, ReRAM, Nano-RAM etc.) Getting Emerging Memories into Production and Scale in a Flash and DRAM Dominated World | Kisaco Research
Session Topics: 
Embedded Memory
Emerging Memories
Speaker(s): 
Moderator

Author:

Jim Handy

General Director
Objective Analysis

Jim Handy of Objective Analysis has over 35 years in the electronics industry including 20 years as a leading semiconductor and SSD industry analyst. Early in his career he held marketing and design positions at leading semiconductor suppliers including Intel, National Semiconductor, and Infineon. A frequent presenter at trade shows, Mr. Handy is highly respected for his technical depth, accurate forecasts, widespread industry presence and volume of publication. He has written hundreds of market reports, articles for trade journals, and white papers, and is frequently interviewed and quoted in the electronics trade press and other media.

Jim Handy

General Director
Objective Analysis

Jim Handy of Objective Analysis has over 35 years in the electronics industry including 20 years as a leading semiconductor and SSD industry analyst. Early in his career he held marketing and design positions at leading semiconductor suppliers including Intel, National Semiconductor, and Infineon. A frequent presenter at trade shows, Mr. Handy is highly respected for his technical depth, accurate forecasts, widespread industry presence and volume of publication. He has written hundreds of market reports, articles for trade journals, and white papers, and is frequently interviewed and quoted in the electronics trade press and other media.

Panellists

Author:

Tirthankar Lahiri

SVP, Data & In-Memory Technologies
Oracle

Tirthankar Lahiri is Vice President of the Data and In-Memory Technologies group for Oracle Database and is responsible for the Oracle Database Engine (including Database In-Memory, Data and Indexes, Space Management, Transactions, and the Database File System), the Oracle TimesTen In-Memory Database, and Oracle NoSQLDB. Tirthankar has 22 years of experience in the Database industry and has worked extensively in a variety of areas including Manageability, Performance, Scalability, High Availability, Caching, Distributed Concurrency Control, In-Memory Data Management, NoSQL architectures, etc. He has 27 issued and has several pending patents in these areas. Tirthankar has a B.Tech in Computer Science from the Indian Institute of Technology (Kharagpur) and an MS in Electrical Engineering from Stanford University.

Tirthankar Lahiri

SVP, Data & In-Memory Technologies
Oracle

Tirthankar Lahiri is Vice President of the Data and In-Memory Technologies group for Oracle Database and is responsible for the Oracle Database Engine (including Database In-Memory, Data and Indexes, Space Management, Transactions, and the Database File System), the Oracle TimesTen In-Memory Database, and Oracle NoSQLDB. Tirthankar has 22 years of experience in the Database industry and has worked extensively in a variety of areas including Manageability, Performance, Scalability, High Availability, Caching, Distributed Concurrency Control, In-Memory Data Management, NoSQL architectures, etc. He has 27 issued and has several pending patents in these areas. Tirthankar has a B.Tech in Computer Science from the Indian Institute of Technology (Kharagpur) and an MS in Electrical Engineering from Stanford University.

Author:

Pedram Khalili

Associate Professor of Electrical and Computer Engineering
Northwestern University

Pedram Khalili-Amiri works on developing the computing systems of the future, starting from novel nano-scale devices/materials that enable systems with unprecedented performance and energy efficiency. Much of his work involves devices that use both the spin and charge of electrons, also referred to as spintronics. Previously Pedram was an adjunct assistant professor in the department of electrical and computer engineering at UCLA from 2013-2017, where he co-led the memory program within the NSF TANMS center, focusing on development of electric-field-controlled magnetic memory with unprecedented energy efficiency. During 2009-2014, at UCLA he was project manager of two DARPA multi-institution programs, focusing on the development of spin-transfer-torque magnetic random access memory (STT-MRAM) and non-volatile logic (NVL), working with several major industry and university partners. These programs resulted in the world’s fastest and lowest-power magnetic memory technologies at the time. In addition, since 2012 he has been co-founder of Inston Inc., a startup company pioneering voltage-controlled MRAM for high-performance computing applications, where he also served as board member and chief technology officer  for five years. His professional activities have included serving as a guest editor for Spin, and serving on the technical program committee of the Joint MMM/Intermag Conference.

Pedram Khalili

Associate Professor of Electrical and Computer Engineering
Northwestern University

Pedram Khalili-Amiri works on developing the computing systems of the future, starting from novel nano-scale devices/materials that enable systems with unprecedented performance and energy efficiency. Much of his work involves devices that use both the spin and charge of electrons, also referred to as spintronics. Previously Pedram was an adjunct assistant professor in the department of electrical and computer engineering at UCLA from 2013-2017, where he co-led the memory program within the NSF TANMS center, focusing on development of electric-field-controlled magnetic memory with unprecedented energy efficiency. During 2009-2014, at UCLA he was project manager of two DARPA multi-institution programs, focusing on the development of spin-transfer-torque magnetic random access memory (STT-MRAM) and non-volatile logic (NVL), working with several major industry and university partners. These programs resulted in the world’s fastest and lowest-power magnetic memory technologies at the time. In addition, since 2012 he has been co-founder of Inston Inc., a startup company pioneering voltage-controlled MRAM for high-performance computing applications, where he also served as board member and chief technology officer  for five years. His professional activities have included serving as a guest editor for Spin, and serving on the technical program committee of the Joint MMM/Intermag Conference.

Author:

Simone Bertolazzi

Principal Analyst, Memory
Yole Group

Simone Bertolazzi, PhD is a Senior Technology & Market analyst, Memory, at Yole Intelligence, part of Yole Group, working with the Semiconductor, Memory & Computing division. As member of the Yole’s memory team, he contributes on a day-to-day basis to the analysis of memory markets and technologies, their related materials, device architectures and fabrication processes. Simone obtained a PhD in physics in 2015 from École Polytechnique Fédérale de Lausanne (Switzerland) and a double M. A. Sc. degree from Polytechnique de Montréal (Canada) and Politecnico di Milano (Italy), graduating cum laude.

Simone Bertolazzi

Principal Analyst, Memory
Yole Group

Simone Bertolazzi, PhD is a Senior Technology & Market analyst, Memory, at Yole Intelligence, part of Yole Group, working with the Semiconductor, Memory & Computing division. As member of the Yole’s memory team, he contributes on a day-to-day basis to the analysis of memory markets and technologies, their related materials, device architectures and fabrication processes. Simone obtained a PhD in physics in 2015 from École Polytechnique Fédérale de Lausanne (Switzerland) and a double M. A. Sc. degree from Polytechnique de Montréal (Canada) and Politecnico di Milano (Italy), graduating cum laude.

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