The Critical Nature of Memory Bandwidth and Latency at Every Level: Achieving the Fastest Solution to Field Equations in History with Waferscale Computing | Kisaco Research

Recent work by the National Energy Technology Laboratory and Cerebras Systems Inc, has underscored the critical needs of sufficient bandwidth and latency in scientific computing.  In this work, the team demonstrated (to the best of our knowledge) the fastest solution to field equations in computing history.  These remarkable results were made possible by the trifecta of great memory bandwidth, great interconnect bandwidth, and amazing (one clock cycle) communication latency and injection rate for small messages.  Furthermore, the bandwidths are sufficiently high such that no memory hierarchy is necessary which significantly simplifies programming models and software development effort and expense.  In this talk we will outline the conditions necessary to achieve these results.

Session Topics: 
Embedded Memory
External Memory
Systems Design
Use Case
Speaker(s): 

Author:

Dirk Van Essendelft

HPC & AI Architect
National Energy Technology Laboratory

Dr. Van Essendelft is the principle investigator for the integration of AI/ML with scientific simulations within in the Computational Device Engineering Team at the National Energy Technology Laboratory.  The focus of Dr. Van Essendelft’s work is building a comprehensive hardware and software ecosystem that maximizes speed, accuracy, and energy efficiency of AI/ML accelerated scientific simulations.  Currently, his work centers around building Computational Fluid Dynamics capability within the TensorFlow framework, generating AI/ML based predictors, and ensuring the ecosystem is compatible with the fastest possible accelerators and processors in industry.  In this way, Dr. Van Essendelft is developing NETL’s first cognitive-in-the-loop simulation capability in which AI/ML models can be used any point to bring acceleration and/or closures in new ways.  Dr. Van Essendelft sits on the Technical Advisory Group for NETL’s new Science-Based Artificial Intelligence/Machine Learning Institute (SAMI) and holds degrees in Energy and Geo-Environmental Engineering, Chemical and Biochemical Engineering, and Chemical Engineering from the Pennsylvania State University, University of California, Irvine, and Calvin College respectively.

Recent publications:

  • Rocki, K., Van Essendelft, D., Sharapov, I., Schreiber, R., Morrison, M., Kibardin, V., Portnoy, A., Dietiker, J. F., Syamlal, M., and James, M. (2020) Fast stencil-code computation on a wafer-scale processor, In Proceedings of the International Conference for High Performance Computing, Networking, Storage and Analysis, pp pp 1-14, IEEE Press, Atlanta, Georgia.

Dirk Van Essendelft

HPC & AI Architect
National Energy Technology Laboratory

Dr. Van Essendelft is the principle investigator for the integration of AI/ML with scientific simulations within in the Computational Device Engineering Team at the National Energy Technology Laboratory.  The focus of Dr. Van Essendelft’s work is building a comprehensive hardware and software ecosystem that maximizes speed, accuracy, and energy efficiency of AI/ML accelerated scientific simulations.  Currently, his work centers around building Computational Fluid Dynamics capability within the TensorFlow framework, generating AI/ML based predictors, and ensuring the ecosystem is compatible with the fastest possible accelerators and processors in industry.  In this way, Dr. Van Essendelft is developing NETL’s first cognitive-in-the-loop simulation capability in which AI/ML models can be used any point to bring acceleration and/or closures in new ways.  Dr. Van Essendelft sits on the Technical Advisory Group for NETL’s new Science-Based Artificial Intelligence/Machine Learning Institute (SAMI) and holds degrees in Energy and Geo-Environmental Engineering, Chemical and Biochemical Engineering, and Chemical Engineering from the Pennsylvania State University, University of California, Irvine, and Calvin College respectively.

Recent publications:

  • Rocki, K., Van Essendelft, D., Sharapov, I., Schreiber, R., Morrison, M., Kibardin, V., Portnoy, A., Dietiker, J. F., Syamlal, M., and James, M. (2020) Fast stencil-code computation on a wafer-scale processor, In Proceedings of the International Conference for High Performance Computing, Networking, Storage and Analysis, pp pp 1-14, IEEE Press, Atlanta, Georgia.