Systems Engineering

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Enter the Era of Autonomous Design: Personalizing Chips for 1,000X More Powerful AI Compute

Macrotrends in innovation are leveraging both software and chips to create the next round of world-changing products. Unlocking the vast potential offered by this innovation model is daunting however. Systemic complexity across all disciplines from silicon to software must be addressed in a holistic way to achieve success. AI applications change over months while chip design can take years, adding to the challenges. Talent shortages also create headwinds. And as more system companies engage in chip design, these headwinds can have a profound impact on the pace of innovation.

Complex chip and system design must be easier to achieve in less time. Sassine Ghazi will discuss several developing strategies that use AI and machine learning techniques to dramatically reduce design time and design risk, opening the opportunity for substantial increases in the pace of innovation.

Chip Design

Edge AI

Novel AI Hardware

Hardware Engineering

Systems Engineering

Author:

Sassine Ghazi

President & COO

Synopsys

Sassine Ghazi leads and drives strategy for all business units, sales and customer success, strategic alliances, marketing and communications at Synopsys. He joined the company in 1998 as an applications engineer. He then held a series of sales positions with increasing responsibility, culminating in leadership of worldwide strategic accounts. He was then appointed general manager for all digital and custom products, the largest business group in Synopsys. Under his leadership, several innovative solutions were launched in areas such as multi-die systems, AI-assisted design and silicon lifecycle management. He assumed the role of chief operating officer in August, 2020 and was appointed to the role of president in November 2021. Prior to Synopsys he was a design engineer at Intel.

Sassine holds a bachelor’s degree in Business Administration from Lebanese American University; a B.S.E.E from the Georgia Institute of Technology and an M.S.E.E. from the University of Tennessee.

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System Differentiation Starts with Smart, Optimized AI/ML SoCs

Many system companies are discovering that optimizing AI/ML SoC devices is a very powerful way to achieve differentiation for specific end-applications. In 2021 the semiconductor industry experienced more rounds of venture capital funding and dollars invested than ever before. What’s more, the investments in new AI companies alonewere higher than all prior yearly totals for all design types combined. Most of these new semiconductor companies targeted specific use cases of AI/ML to achieve aggressive performance, power/heat and other system objectives. Now, system companies are designing their own custom AI/ML SoCs—whether it is hyperscalers, automotive OEMs, edge or telecommunication companies–to address their own unique system-level needs.

Joe Sawicki, executive vice president, IC Siemens EDA, will explain how SoC design solutions are enabling both semiconductor and system companies to efficiently arrive at the global optimization point between power, performance, cost, yield and other factors in their AI/ML hardware designs. All focused on achieving a holistic, optimized system-level differentiation.

Chip Design

Edge AI

Novel AI Hardware

Hardware Engineering

Systems Engineering

Author:

Joseph Sawicki

EVP, IC EDA

Siemens

Joseph Sawicki is a leading expert in IC nanometer design and manufacturing challenges. Formerly responsible for Mentor's industry-leading design-to-silicon products, including the Calibre physical verification and DFM platform and Mentor's Tessent design-for-test product line, Sawicki now oversees all business units in the Siemens EDA IC segment.

Sawicki joined Mentor Graphics in 1990 and has held previous positions in applications engineering, sales, marketing, and management. He holds a BSEE from the University of Rochester, an MBA from Northeastern University's High Technology Program, and has completed the Harvard Business School Advanced Management Program.

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AI Hardware Is All About Software - Vertically Integrated Solutions Or/And A Unified Framework and Software Stack for ML Systems

Developer Efficiency

Enterprise AI

Data Science

Software Engineering

Systems Engineering

Moderator

Author:

Carlos Guestrin

Professor, Computer Science

Stanford

Carlos Guestrin is a Professor in the Computer Science Department at Stanford University. His previous positions include the Amazon Professor of Machine Learning at the Computer Science & Engineering Department of the University of Washington, the Finmeccanica Associate Professor at Carnegie Mellon University, and the Senior Director of Machine Learning and AI at Apple, after the acquisition of Turi, Inc. (formerly GraphLab and Dato) — Carlos co-founded Turi, which developed a platform for developers and data scientist to build and deploy intelligent applications. He is a technical advisor for OctoML.ai. His team also released a number of popular open-source projects, including XGBoost, LIME, Apache TVM, MXNet, Turi Create, GraphLab/PowerGraph, SFrame, and GraphChi. Carlos received the IJCAI Computers and Thought Award and the Presidential Early Career Award for Scientists and Engineers (PECASE). He is also a recipient of the ONR Young Investigator Award, NSF Career Award, Alfred P. Sloan Fellowship, and IBM Faculty Fellowship, and was named one of the 2008 ‘Brilliant 10’ by Popular Science Magazine. Carlos’ work received awards at a number of conferences and journals, including ACL, AISTATS, ICML, IPSN, JAIR, JWRPM, KDD, NeurIPS, UAI, and VLDB. He is a former member of the Information Sciences and Technology (ISAT) advisory group for DARPA.

Author:

Sakyasingha Dasgupta

Founder & CEO

EdgeCortix

Dr. Sakyasingha Dasgupta is the founder and CEO of Edgecortix, Inc. He is an AI and machine learning technologist, entrepreneur and engineer with real-world experience in taking cutting edge research from ideation stage to scalable products. Having worked at global companies like Microsoft, IBM Research and national research labs like RIKEN and Max Planck Institute, in his more recent roles, he has helped establish and lead technology teams at lean startups in Japan and Singapore, in robotics & automation and Fintech sectors.

After spending more than a decade in research and development in diverse areas like, brain inspired computing, robotics, computer vision, hardware acceleration for AI, wearable devices, internet of things, machine learning in finance and healthcare, Sakya founded EdgeCortix, a deep-tech startup automating machine learning driven AI hardware & software co-design for an intelligent distributed edge ecosystem.

Sakyasingha recently took part in a webinar titled "Software, The Elephant in the Room for Edge AI Hardware Acceleration" - register for free to watch on-demand here

Author:

Luis Ceze

Co-founder and CEO

OctoML

Luis Ceze is Co-founder and CEO at OctoML, Professor in the Paul G. Allen School of Computer Science and Engineering at the University of Washington, and Venture Partner at Madrona Venture Group. His research focuses on the intersection between computer architecture, programming languages, machine learning and biology. His current focus is on approximate computing for efficient machine learning andDNA-based data storage. He co-directs the Molecular Information Systems Lab (MISL), the Systems and Architectures for Machine Learning lab (SAMPL) and the Sampa Lab for HW/SW co-design. He is a recipient of an NSF CAREER Award, a Sloan Research Fellowship, a Microsoft Research Faculty Fellowship, the IEEE TCCA young Computer Architect Award and UIUC Distinguished Alumni Award.

Author:

Jian Zhang

Director, Machine Learning

SambaNova Systems

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Transformers: Rise of the Beasts… Bringing GPT Sized Language Models into the Enterprise - A Systems-Level View

Transformers are in high demand, particularly in industries like BFSI and healthcare, for language processing, understanding, classification, generation and translation. The parameter counts for models like GPT, that are fast becoming the norm in the world of NLP, are mind-boggling, and the cost involved in training and deploying even more so. If the vast potential for LLMs is to extend beyond the wealthiest companies and research institutions on the planet, then there is a need to evaluate how to lower the barriers of entry for experimentation and research on models like GPT. There's also a need to discuss the extent to which bigger is better, in the field of practical and commercial NLP.

This panel will look at the state of play of how enterprises are using large language models today, what their plans are for future research in NLP, and how hardware & systems builders and organizations like HuggingFace can help bring state-of-the-art performance into production in smaller, more resource-constrained enterprises and labs.

Developer Efficiency

Enterprise AI

ML at Scale

NLP

Novel AI Hardware

Systems Design

Data Science

Hardware Engineering

Software Engineering

Strategy

Systems Engineering

Author:

Phil Brown

VP, Scaled Systems Product

Graphcore

Phil leads Graphcore’s efforts to build large scale AI/ML processing capability using Graphcore unique Intelligence Processing Units (IPUs) and IPU-Fabric and Streaming Memory technology. Previously he has held a number of different roles at Graphcore including Director of Applications, leading development of Graphcore’s flagship AL/ML models, and Director of Field Engineering, which acts as the focal point for technical engagements with our customers. Prior to joining Graphcore, Phil worked for Cray Inc. in a number of roles, including leading their engagement with the weather forecasting and climate research customers worldwide and as a technical architect. Phil holds a PhD in Computational Chemistry from the University of Bristol.

Author:

Selcuk Kopru

Director, Engineering & Research, Search

eBay

Selcuk Kopru is Head of ML & NLP at eBay and is an experienced AI leader with proven expertise in creating and deploying cutting edge NLP and AI technologies and systems. He is experienced in developing scalable Machine Learning solutions to solve big data problems that involve text and multimodal data. He is also skilled in Python, Java, C++, Machine Translation and Pattern Recognition. Selcuk is also a strong research professional with a Doctor of Philosophy (PhD) in NLP in Computer Science from Middle East Technical University.

Author:

Jeff Boudier

Product Director

Hugging Face

Jeff Boudier is a product director at Hugging Face, creator of Transformers, the leading open-source NLP library. Previously Jeff was a co-founder of Stupeflix, acquired by GoPro, where he served as director of Product Management, Product Marketing, Business Development and Corporate Development.

Author:

Morteza Noshad

Senior ML/NLP Scientist

Vida Health

Morteza Noshad is a senior ML/NLP scientist at Vida health. He is skilled at designing large scale NLP models for different healthcare applications such as automated clinical documentation, symptom detection and question answering. Morteza was a research scientist at Stanford University focusing on graph neural networks for clinical decision support systems where he received the SAGE Scientist Award for his research. Morteza received his Ph.D. in Computer Science from University of Michigan where he contributed to the theory of information bottleneck in deep learning.

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Software-Defined Hardware & Systems Co-Design

AI acceleration is a full stack effort and involves a multidisciplinary and holistic approach to design and optimization.

The field of deep learning has gained substantially from co-design concepts across the AI technology stack. The simultaneous design and optimization of hardware and software has led to new algorithms, numerical optimizations, and AI hardware.

Looking at the AI stack for workloads like computer vision, NLP and Ads, in both a vertical and horizontal sense, there are significant opportunities and challenges for optimization through co-design. This panel will focus on software-defined chips and systems for AI (specs & evaluation, datacenter & edge) and look at the systems-level approach to co-design, including compilers and runtime etc.

Chip Design

Novel AI Hardware

Systems Design

Hardware Engineering

Software Engineering

Systems Engineering

Author:

Nick Ni

Senior Director, Datacenter AI & Compute Markets

AMD

Nick Ni is Senior Director, Data Center AI and Compute Markets at Adaptive Embedded Computing Group (AECG) at AMD, responsible for the P&L of the fast-growing Data Center AI and compute segment. His team is responsible for product marketing and product management including AI product planning, go-to-market, business development and solution architecture.

Author:

Xiaoyong Liu

Director, AI Platform

Alibaba

Author:

Shubho Sengupta

Software Engineer

Meta

Shubho Sengupta is a Software Engineer at Meta, where he designs Meta’s Research Infra for AI training. He started working on AI in 2014, on speech related AI models like DeepSpeech and DeepVoice. Before that he pioneered many of the foundational algorithms in general purpose programming in GPUs, which has won Test of Time award. These days, he also works at the intersection of cryptography and computation, specifically in bi-partite and multi-partite matching algorithms.

Author:

Dr. Charles Fan

CEO and Co-Founder

MemVerge

Charles Fan is CEO and co-founder of MemVerge. Prior to MemVerge, Charles was the CTO of Cheetah Mobile leading its global technology teams, and an SVP/GM at VMware, founding the storage business unit that developed the Virtual SAN product. Charles also worked at EMC and was the founder of the EMC China R&D Center. Charles joined EMC via the acquisition of Rainfinity, where he was a co-founder and CTO. Charles received his Ph.D. and M.S. in Electrical Engineering from the California Institute of Technology, and his B.E. in Electrical Engineering from the Cooper Union.

Author:

Zaid Kahn

GM, Cloud AI & Advanced Systems Engineering

Microsoft

Zaid is currently GM in Cloud Hardware Infrastructure Engineering where he leads a team focusing on advanced architecture and engineering efforts for AI. He is passionate about building balanced teams of artists and soldiers that solve incredibly difficult problems at scale.

Prior to Microsoft Zaid was head of infrastructure engineering at LinkedIn responsible for all aspects of engineering for Datacenters, Compute, Networking, Storage and Hardware. He also lead several software development teams spanning from BMC, network operating systems, server and network fleet automation to SDN efforts inside the datacenter and global backbone including edge. He introduced the concept of disaggregation inside LinkedIn and pioneered JDM with multiple vendors through key initiatives like OpenSwitch, Open19 essentially controlling destiny for hardware development at LinkedIn. During his 9 year tenure at LinkedIn his team scaled network and systems 150X, members from 50M to 675M, and hiring someone every 7 seconds on the LinkedIn Platform.

Prior to LinkedIn Zaid was Network Architect at WebEx responsible for building the MediaTone network and later I built a startup that built a pattern recognition security chip using NPU/FPGA. Zaid holds several patents in networking and SDN and is also a recognized industry leader. He previously served as a board member of the Open19 Foundation and San Francisco chapter of Internet Society. Currently he serves on DE-CIX and Pensando advisory boards.

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Who Cares About Heterogeneity? Finding Homes for Novel AI Hardware

As scientific and machine learning workloads converge in the world of HPC, and supercomputing centers gear up for the era of exascale computing, discussions on heterogeneous systems design abound. HPC leaders increasingly need to support converged application workloads that extend beyond AI/HPC to include other computational kernels/patterns like data analytics, graph algorithms, and uncertainty quantification. In this sector, the value of heterogeneity in systems design is clear and promising, even if the method for executing these concepts is still to be determined.

However, in many industrial sectors, enterprise end customers simply use the 'threat' of heterogeneity as a tool to extract some discount from their main/incumbent vendor. The job of IT is hard enough, planning for compute, storage and networking needs, that adding a lot of compute specialization is often not high on a CIO’s priority list.

So, who cares about heterogeneity? Where will heterogeneity in systems design change the game, and what will be its level and quality?

Chip Design

ML at Scale

Novel AI Hardware

Systems Design

Hardware Engineering

Strategy

Systems Engineering

Author:

Wahid Bhimji

Acting Group Lead, Data & Analytics

NERSC

Wahid Bhimji is acting Group Lead and a Big Data Architect in the Data and Analytics Services Group at NERSC. His interests include machine learning and data management. Recently he led several projects applying AI for science including deep learning at scale, generative models and probabilistic programming. He coordinates aspects of machine learning deployment for the Lab's CS-Area and NERSC: including the upcoming Perlmutter HPC system and plans for future NERSC machines. Previously he was user lead for the commissioning of Cori Phase 1, particularly data services, and for the Burst Buffer. Wahid has worked for many years in Scientific Computing and Data Analysis in Academia and the U.K. Government and has a Ph.D. in High-Energy Particle Physics.

Author:

Weifeng Zhang

Chief Scientist, Heterogeneous Computing

Alibaba

Weifeng Zhang is the Chief Scientist of Heterogeneous Computing at Alibaba Cloud Infrastructure, responsible for performance optimization of large scale distributed applications at the data centers. Weifeng also leads the effort to build the acceleration platform for various ML workloads via heterogeneous resource pooling based on the compiler technology. Prior to joining Alibaba, Weifeng was a Director of Engineering at Qualcomm Inc, focusing on GPU compiler and performance optimizations. Weifeng received his B.Sc. from Wuhan University, China and PhD in Computer Science from University of California, San Diego.

Author:

Cedric Bourrasset

Head, High Performance AI Business Unit

Atos

Dr. Cedric Bourrasset is AI Business Leader for High Performance Computing Business Unit at Atos. He is also AI product manager for the Atos Codex AI suite, software enabling AI workloads into HPC environments as well as integrating a computer vision solution. He joined Atos in 2016 as an expert in the HPC/AI domain.

Previously, Cedric received his Ph.D. in Electronics and computer vision from the Blaise Pascal University of Clermont-Ferrand defending the dataflow model of computation for FPGA High Level Synthesis problematic in embedded machine learning applications.

Author:

Bhupender Thakur

Product Manager, Scientific Computing

Roche

Bhupender Thakur is Product portfolio owner for several High Performance and Big Data platforms for research and early development at Roche. He is the Agile product portfolio owner of on-premise HPC services delivering compute and storage clusters in several locations across the USA, Germany and Switzerland, and product owner for workflow applications for NGS and Oncology research supporting Roche Avenio product offerings.

Bhupender leads a cross functional squad of developers, product owners, architects and subject matter experts, working on roadmaps for existing and new research offerings and leading discussions on planning, lifecycle, operations and business continuity.

He holds a PhD in Theoretical and Computational Nuclear Physics from the University of Delaware.

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Massive Natural Language Model Processing

Cerebras Systems builds the fastest AI accelerators in the industry. In this talk we will review how the size and scope of massive natural language processing (NLP) presents fundamental challenges to legacy compute and to traditional cloud providers. We will explore the importance of guaranteed node to node latency in large clusters, how that can’t be achieved in the cloud, and how it prevents linear and even deterministic scaling. We will examine the complexity of distributing NLP models over hundreds or thousands of GPUs and show how quickly and easily a cluster of Cerebras CS-2s is set up, and how linear scaling can be achieved over millions of compute cores with Cerebras technology. And finally, we will show how innovative customers are using clusters of Cerebras CS-2s to train large language models in order to solve both basic and applied scientific challenges, including understanding the COVID-19 replication mechanism, epigenetic language modelling for drug discovery, and in the development of clean energy. This enables researchers to test ideas that may otherwise languish for lack of resources and, ultimately, reduces the cost of curiosity.

Chip Design

Enterprise AI

ML at Scale

Novel AI Hardware

Systems Design

Data Science

Hardware Engineering

Software Engineering

Strategy

Systems Engineering

Author:

Andy Hock

VP, Product Management

Cerebras

Dr. Andy Hock is VP of Product Management at Cerebras Systems with responsibility for product strategy. His organization drives engagement with engineering and our customers to inform the hardware, software, and machine learning technical requirements and accelerate world-leading AI with Cerebras’ products. Prior to Cerebras, Andy has held senior leadership positions with Arete Associates, Skybox Imaging (acquired by Google), and Google. He holds a PhD in Geophysics and Space Physics from UCLA.

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New Frontiers in Large Scale AI Infrastructure Builds

In this keynote, Dr. Cédric Bourrasset, AI Distinguished Expert at Atos, will reveal how Atos pioneered the successful architecture, build, and delivery of large-scale AI infrastructures. He will present a live demonstration of Atos-driven technology to illustrate new AI-driven endpoints featuring GPU and IPU workflow capabilities, featuring a global customer case study to elaborate on the current complex challenges faced by designing and manufacturing large-scale AI computing platforms. He will also leverage over 15 years of personal experience in designing and manufacturing supercomputing systems.

Developer Efficiency

Edge AI

Enterprise AI

ML at Scale

Novel AI Hardware

Systems Design

Data Science

Hardware Engineering

Software Engineering

Strategy

Systems Engineering

Author:

Cedric Bourrasset

Head, High Performance AI Business Unit

Atos

Dr. Cedric Bourrasset is AI Business Leader for High Performance Computing Business Unit at Atos. He is also AI product manager for the Atos Codex AI suite, software enabling AI workloads into HPC environments as well as integrating a computer vision solution. He joined Atos in 2016 as an expert in the HPC/AI domain.

Previously, Cedric received his Ph.D. in Electronics and computer vision from the Blaise Pascal University of Clermont-Ferrand defending the dataflow model of computation for FPGA High Level Synthesis problematic in embedded machine learning applications.

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What Happens After Digital? The Roadmap for Neuromorphic Artificial Intelligence

Chip Design

Developer Efficiency

Edge AI

Enterprise AI

ML at Scale

Novel AI Hardware

Systems Design

Data Science

Hardware Engineering

Software Engineering

Strategy

Systems Engineering

Author:

Gordon Wilson

Co-Founder & CEO

Rain Neuromorphics

Read more about What Happens After Digital? The Roadmap for Neuromorphic Artificial Intelligence

The Compute Requirements of Developing Super-Human Cognition

The true potential of AI rests on super-human learning capacity, and on the ability to selectively draw on that learning. Both of these properties – scale and selectivity – challenge the design of AI computers and the tools used to program them. A rich pool of new ideas is emerging, driven by a new breed of computing company, according to Graphcore co-founder Simon Knowles. At the AI Hardware Summit, Phil Brown, VP Scaled Systems Product discusses the creation of the Intelligence Processing Unit (IPU) – a new type of processor, specifically designed for AI computation. He looks ahead, towards the development of AIs with super-human cognition, and explores the nature of computation systems needed to make powerful AI an economic everyday reality.

Developer Efficiency

Enterprise AI

ML at Scale

Novel AI Hardware

Systems Design

Data Science

Hardware Engineering

Software Engineering

Strategy

Systems Engineering

Author:

Phil Brown

VP, Scaled Systems Product

Graphcore

Phil leads Graphcore’s efforts to build large scale AI/ML processing capability using Graphcore unique Intelligence Processing Units (IPUs) and IPU-Fabric and Streaming Memory technology. Previously he has held a number of different roles at Graphcore including Director of Applications, leading development of Graphcore’s flagship AL/ML models, and Director of Field Engineering, which acts as the focal point for technical engagements with our customers. Prior to joining Graphcore, Phil worked for Cray Inc. in a number of roles, including leading their engagement with the weather forecasting and climate research customers worldwide and as a technical architect. Phil holds a PhD in Computational Chemistry from the University of Bristol.

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